8 Trace Only Automata 179 Trace Assertion
نویسنده
چکیده
The trace assertion method is a formal state machine based method for specifying module A module interface speciication treats the module as a black-box, identifying all module's access programs (i.e. programs that can be invoked from outside of the module), and describing their externally visible eeects. A formal model for the trace assertion method is proposed. The concept of step-traces is introduced and applied. The role of non-determinism, normal and exceptional behaviour, value functions and multi-object modules are discussed. The relationship with the Algebraic Speciication ((9, 37]) is analyzed.
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